The semiconductor industry is continually striving to improve yield and reliability of semiconductor products, such as for example transistors and resistors, thus leading to faster and more complex integrated circuits (ICs). Indeed, as technology scales down, it is continuously required to decrease the device geometries in order to achieve the desired circuit functions, power consumption and operation speed, for example. For such high performance ICs used in circuit design, the statistical variations of the manufacturing process parameters associated with the manufacturing process for the IC, the devices located therein may vary significantly from given specifications, thus resulting in corresponding fluctuations in circuit performance metrics.
There is thus a need to provide a way to predict circuit performance metrics with respect to process parameter variations, prior to the actual manufacture of the circuit.
One of the commonly used tools to assess circuit performance metrics are based on Monte Carlo simulation technique wherein multiple process parameters are varied simultaneously based on underlying probability distributions of the process parameters. Unfortunately, such tools require a large number of circuit simulations to provide a desired level of confidence in the calculated statistics of the performance metrics. This is due, mainly, to numerous process parameters associated with the devices.
An alternative to the Monte Carlo simulation technique is the circuit sensitivity analysis. Circuit sensitivity analysis is a powerful tool for predicting significant process parameters of a circuit which contribute to circuit performance metrics variability and which ultimately affect the yield of the circuit. Circuit sensitivity analysis may be based on sensitivity coefficients which may be defined as being the small fractional change in a circuit performance metrics with respect to a fractional change in the value of any one of the process parameters of the circuit. Namely, if a small change in a process parameter results in a relatively large change in a circuit performance metrics, the circuit performance metrics is considered to be sensitive to the process parameters. Conversely, if a small change in a process parameter results in a relatively small change in a circuit performance parameter metrics, the circuit performance metrics is considered not to be sensitive to the process parameters. Therefore, a circuit design engineer may be guided by such circuit sensitivity analysis results in his tasks in, for example, choosing elementary devices which are the most influential on the performance metrics of a final circuit.
Numerous methods are known for performing circuit sensitivity analysis. One method is the one-factor-at-a-time (OAT) method also known as the “brute-force” method, in which process parameters are varied individually in turn by a fixed percentage, e.g. 5 percent or 10 percent, around a nominal value of the process parameters, while holding all other process parameters constant at their nominal values, wherein nominal values may be provided by the foundry. Then for each process parameter variation, a circuit sensitivity simulation is performed and the sensitivity of one or more circuit performance metrics is calculated. Hence, for m process parameters, this method requires m+1 simulations, one for the nominal value and one for the variation of a process parameter. However, OAT method is also computationally expensive since the number of simulations is tightly related to the number of process parameters and also to the number of devices of the circuit under design.